Ultra-fast switching memristors based on two-dimensional materials

The ability to scale two-dimensional (2D) material thickness down to a single monolayer presents a promising opportunity to realize high-speed energy-efficient memristors. Here, we report an ultra-fast memristor fabricated using atomically thin sheets of 2D hexagonal Boron Nitride, exhibiting the shortest observed switching speed (120 ps) among 2D memristors and low switching energy (2pJ). Furthermore, we study the switching dynamics of these memristors using ultra-short (120ps-3ns) voltage pulses, a frequency range that is highly relevant in the context of modern complementary metal oxide semiconductor (CMOS) circuits. We employ statistical analysis of transient characteristics to gain insights into the memristor switching mechanism. Cycling endurance data confirms the ultra-fast switching capability of these memristors, making them attractive for next generation computing, storage, and Radio-Frequency (RF) circuit applications.


Variation in the device characteristics
The voltage distribution presented in Fig. 2c of the main text shows a larger variation for SET (1V to 3V) than RESET.To understand the source of this variation, we segregated the data to cycleto-cycle and device-to-device components.From Supplementary figure.9,qualitatively, we observe that the cycle-to-cycle variation is lower than the device-to-device variation.To quantify this observation, we chose four devices and plotted their IV characteristics in Supplementary figure .10.Here, although the mean SET voltage varies considerably (between 1.2V and 2.54V), the distributions are relatively tightly bound around the mean value with a worst-case standard deviation of 0.25V.Whereas the standard deviation of the overall distribution (Fig. 2c) is about 0.5V.This indicates that the device-to-device variation is the dominant cause of variation for these memristors.
Supplementary figure 10: (a-d) DC IV characteristics measured from four different memristor devices.
We speculate that the electrode surface roughness contributes to the higher device-to-device variation among these devices.Evaporated metal electrodes typically have a surface roughness of about 1-2nm [S16-S17].The effect of this roughness on the switching characteristics should be lower in memristors with thicker switching layer (>5nm).However, as the switching layer thickness scales down, it is easier for filaments to propagate vertically and form around weak spots with bumps/hillocks.Therefore, the surface roughness of the electrodes will largely determine the location and voltage of the breakdown.These variations can be reduced with industry-standard tools that can achieve lower surface roughness, which is difficult to achieve with university equipment.

Conductive Atomic Force Microscopy
To confirm the proposed filamentary conduction mechanism, we performed Conductive AFM (CAFM) measurements on our devices.Sample preparation process flow and experimental setup are shown in the schematic below (Supplementary Figure 12.1).This approach of using ionic liquid for CAFM measurements was adopted from previous work [S18].The sample was prepared such that the titanium metal made contact with the hBN layer to emulate our device structure.Filaments were formed in the hBN layer by stressing the device as shown in Supplementary Figure 12.1(g) (positive voltage to the bottom electrode).After stressing the devices, the ionic liquid was washed away, PMMA was dissolved in acetone and then the samples were taken to CAFM for measurements.During the CAFM measurements, the AFM tip comes in contact with the hBN layer and the back-side silicon substrate is grounded.Large area scan (300nmx300nm) clearly shows the formation of conductive filaments (Supplementary Figure 12.2(a)) across the hBN layer.High resolution scan of a single conducting filament is presented in Supplementary Figure 12.2(b).Based on the CAFM and EELS measurements (Fig. 2g, main text), we can conclude that the dominant switching mechanism in our devices originates from the formation/dissolution of Ti ion constituted conductive filaments.
Here the switching time is defined as the time taken for the current signal to settle to ~90% of its final magnitude.Most other studies do not include the rise time of the voltage pulse, and the switching time is usually reported as the time required to reach 50% of the final current magnitude.
Though such characterization provides an attractive switching time estimate (results in TSWITCH < 1ns in our measurement), we believe that such an approach does not reflect a realistic scenario.Therefore, the switching time data provided in this study should be taken as a realistic estimate.Data extracted from 200 different traces have been used for further analysis in Figure 4,5 in the main text.

Ultra-fast switching in 2D memristors
The switching mechanism in our devices is based on metal ion diffusion into the switching layer.
The applied electric field facilitates the vertical propagation of the filament around weak spots in the dielectric.This initially formed narrow filament connects the electrodes and lowers the resistance of the memristor.The current flowing through this filament generates temperature through the Joule heating phenomenon.The temperature generated in the filament lowers the energy barrier for ion release from the electrode and further propels the filament growth.To understand the fundamental reason for the ultra-fast switching in our devices, we perform transient thermal analysis using finite element based physics solvers (COMSOL).To summarize the results, the characteristic properties aiding the ultra-fast switching in 2D hBN memristors are: 1. Ultra-thin switching layer 2. High thermal conductivity of 2D hBN layers Ultra-thin switching layer Oxide memristors (commercial or university demonstrations) typically have a thicker switching layer (5nm-20nm) in comparison to the memristors in this study (< 2.4nm).The thinner switching layer significantly increases the local electric field across the dielectric, which promotes faster resistance switching.Supplementary Fig.17 From the Arrhenius model [S19-S21], the filament growth dynamics depend on the temperature in addition to the applied voltage.The critical physical process that determines the switching speed of the device is the metal ion release [S19] which is determined by the Ti/hBN interface temperature (TINT).Note that this temperature is different from the filament temperature (TCF).The current passing through the device generates temperature in the filament (TCF) through joule heating.This temperature is highest at the center of the filament (vertically) and lowers towards the electrodes, as seen in Supplementary Fig. 17.1b.This type of temperature profile has been reported in several previous studies [S20-S22].Most studies approximate TCF ~ TINT for simplicity in analytical modeling.
Using the COMSOL model, we study the TINT dependence on dielectric thickness, as shown in Supplementary Fig. 17.1c.It is evident that as the dielectric thickness reduces, steady-state TINT increases.In addition, Supplementary Fig. 17.1d plots the time taken for temperature build-up at the interface as a function of dielectric thickness.We plot the time taken to reach 400K, 500K, and 600K for comparison.The TINIT for thinner dielectric (such as the devices in this study) reaches 600K in less than 1ps, whereas thicker dielectric ~5nm takes about 40ps.The faster temperature build-up at the interface promotes faster metal ion release, which creates a positive feedback loop: higher TINT → lower R → higher TINT.This positive feedback loop promotes faster switching in devices with a thinner dielectric layer.

High thermal conductivity of 2D hBN
Based on the previous discussion, the obvious subsequent question would be -"Will the oxide RRAMs with thinner switching layer switch as fast as the 2D memristors?"To answer this question, we simulated two devices -one with an HfOx layer and the other with 2D hBN, with identical switching layer thicknesses (2.5nm).
In addition to thickness, another physical property that determines the switching speed of the devices is the thermal conductivity of the switching layer.The in-plane thermal conductivity of hBN (k ~ 100-200 W/mK) [S23-S25] is significantly higher than oxides (k ~ 0.5-2 W/mK) typically used for memristors (HfO2, Al2O3, TaOx) [S26-S28].On the other hand, the out-of-plane thermal conductivity is comparable (~5 mW/K) to the oxides.The high thermal conductivity quickly spreads the heat from the filament to the surroundings, which heats a larger cross-section of the interface.Supplementary Fig. 17.2a shows three points on the interface at 2nm,4nm, and 6nm away from the filament.Temperature transients at these points (Supplementary Fig. 17.2 b,c,d) highlight this effect.Evidently, TINT increases rapidly for hBN compared to HfOx.This effect is especially more pronounced as we move away from the filament (points B, C).Since a larger cross-section of the interface is heated, the probability of ion release increases, which results in faster filament expansion.Therefore, 2D materials that typically have higher thermal conductivity promote faster switching compared to oxide RRAMs with identical layer thickness.
Overall, the 2D memristors benefit from having an ultra-thin switching layer as well as high thermal conductivity compared to TMO memristors.Fig. 4d (main text) shows the TINT for hBN devices with 2.5nm thickness and HfOx devices with 5nm thickness (typical thickness for TMO memristors).
Clearly, the temperature rises rapidly for the hBN devices, resulting in ultra-fast switching.As explained in the methods section, the resistance during the pulse is directly measured by the oscilloscope, whereas the resistance before/after the pulse is measured through a current amplifier in the branched DC path.Therefore, any additional resistance in the DC path can increase the resistance after the pulse.Supplementary Fig. 19 shows that the resistance during and after the pulse measured close to 1.2kΩ.Therefore, the resistance increase observed after the pulse in Fig. 5c (main text) is indeed a characteristic feature of the memristors associated with Joule heating.should not be confused with the resistance relaxation observed in volatile resistive switching devices since the currents in this study (~6mA-12mA) are higher than the volatile switching devices current limits (<100uA) [S18,S29].Therefore, the data suggest that the filament crosssection is reduced.(d) The post-switching resistance increase (RFIN/RPUL) correlates (weakly) to a higher excess switching energy, implying that high temperature may induce random ions migration away from the filament, which suppresses the filament conductivity (e), (f) DC I-V sweep showing current decrease during a SET pulse.These rare instances of current decrease occur when RESET does not sufficiently dissolve the filament, and a large current promotes its further thermal dissolution that is consistent with the suggestion in (d).Such Joule heating induced resistance increase in 2D hBN memristors has been previously reported [S30].

Supplementary figure 21: Filament growth model
The switching mechanism in our devices is based on titanium ion migration into the hBN layer that form filaments.The filament growth model based on Arrhenius relationship is a universally accepted phenomenological model that satisfactorily captures the growth dynamics in TMO memristors and CBRAMs (conductive bridge RAM) [S19, S31-S33].Therefore, in this study, we employ the same model with modifications to capture the behavior of our 2D memristors under ultra-fast voltage pulse stresses.Based on this model, the time dependency of the filament growth can be described by, where Φ → filament diameter A1 → pre-exponent factor Ea0 → Activation energy for bond breaking and ion hopping α → barrier lowering coefficient q → charge of electron V → voltage across the device k → Boltzmann's constant TCF → conductive filament temperature According to Eq.( 1), the filament growth rate depends on the applied voltage as well as the temperature of the memristor device.Based on the equations presented in [S32], the thermal time constant of the filament can be calculated to be 0.226ps for our devices.As the thermal time constant is ~500x smaller than the input pulses (TPULSE ~ 120ps-3ns), any transient effects can be safely neglected.Therefore, the conductive filament temperature can be obtained by solving the steady-state Fourier heat equation.
The ramping voltage pulse facilitates the vertical propagation of the filament around weak spots in the dielectric.This initially formed narrow filament connects the electrodes and lowers the resistance, which increases the current in the memristor.The local temperature (TCF), determined by Joule heating of the filament (TCF ∝ V*I), in turn, increases with current that further propels the filament growth.This self-accelerating process -larger Φ → larger I → larger T → larger Φ proceeds until the device enters a high current regime where secondary effects begin to manifest.
In the high current regime (I>5mA), the external resistance RC (arising from contact leads) results in a voltage drop, thereby lowering the effective voltage across the device (VDEV).In addition, TCF increases significantly in the high current regime, which increases the out-diffusion of ions from the filament, thus promoting the dissolution of the filament.The out-diffusion of ions from the filament can be modeled by, where Ea is an activation energy for out-diffusion of ions from the filament.The overall filament growth rate can be modeled by combining Eq.(1) and Eq.( 2), The first term in Eq.( 3) represents the filament growth due to ion diffusion from the Ti electrode and the second term describes the filament dissolution due to ion out-diffusion from the filament.During the switching energy phase, when the Joule heating is insignificant (low current in the memristor), the filament growth rate dominates, resulting in filament expansion.On the other hand, during the excess energy phase, when Joule heating is significant (high current in the memristor), the filament dissolution rate increases.Here, a stable equilibrium is established between filament growth and dissolution processes.The system restores back to the equilibrium state when disturbed.For example, let us assume that the second term in Eq.( 3) begins to dominate, then the following events occur: Φ decreases → R increases → TCF decreases → Φ increases.This negative feedback loop ensures that the filament diameter and the corresponding current through the device saturate after reaching a certain maximum, as evident from Fig. 3b   Although a few studies report higher endurance at 100ps switching speed [S49-S50], they employ program-verify scheme during endurance cycling.In this approach, the device is subjected to repeating pulses until the desired transition (SET and RESET) is completed and several cycles may involve multiple pulses for successful operation.For the evaluation consistency, such studies have been omitted from this analysis.Moreover, if the device requires multiple pulses (even on a few instances), the switching speed cannot be reliably characterized.

Endurance in 2D memristors
The endurance in 2D memristors has been a concern, mainly attributed to the ultra-thin switching layer.Transition metal oxide (TMO) based memristors typically have a switching layer thickness ranging between 5nm-20nm [S51-S53].On the contrary, 2D memristors typically have ultra-thin switching layers, sometimes even scaled down to monolayer thickness.The reduced vertical separation between metal electrodes enhances the electric field, which results in weaker control over the metal ion migration into the switching layer and subsequent filament formation.Moreover, as the thickness of the switching layer reduces, the impact of bottom/top electrode roughness plays a significant role in determining the overall device performance.In the following table, we have listed the reported endurance in 2D memristors along with the thickness of the switching layer.

Role of Current Compliance (CC)
A recent study [S75] reported high endurance of ~10 6 cycles in the 1T1M (1transistor-1memristor) bitcell with just ~6.6nm thick switching layer.In that study, the standalone devices without CMOS transistors exhibited only 100 cycles, whereas devices with transistors exhibited a million cycles.This promising result suggests that the adjoining selector device can improve endurance in 2D memristor devices.
The characterization setup utilized in this study cannot support external current compliance (CC) for high-frequency pulse testing.For the frequency range studied in this article, the external CC device (resistor, diode or transistor) must be located within <1cm distance from the DUT (device under test) to avoid refelctions.Therefore, the only possible option is to have a CC device fabricated monolithically, like in [S75].Without current compliance, most of our devices get shorted during testing, which cannot be recovered.We expect that having a 1T1M configuration would improve the endurance of our devices as well.

Supplementary figure 11 :
(a) DC current voltage sweep of a device in HRS.The reverse sweep (blue) traces the forward sweep (red) over the entire I-V range, indicating that the change in slope is caused by the transport mechanism inside the dielectric rather than the filament formation.(b) RESET I-V curve plotted on the log-log scale.The device exhibits linear conduction in the LRS and SCLC in the HRS.

Figure 12 . 1 :
Schematic showing the sample preparation process flow for Conductive AFM measurement.(a) Initial Si/SiO2 substrate (SiO2 thickness -20nm) (b) Pattern and etch SiO2 such that the Si surface is exposed (c) PVD deposition of Au followed by Ti (d) Transfer hBN film onto the bottom electrode (Ti comes in contact with hBN) (e) Spin coat PMMA layer (f) pattern and develop PMMA layer (small region 3x3um 2 exposed) (g) Drop ionic liquid (makes contact with hBN layer) and apply voltage bias.
.1a shows the electric field increases inside the switching layer as the dielectric thickness reduces.Supplementary Figure 17.1:(a) Electric field vs dielectric thickness for V=1V.(b) Snapshot of the COMSOL model showing the metallic filament and electrodes.The temperature profile shows the highest temperature at the center of the filament.(c) Temperature reaching the interface vs dielectric thickness (d) time taken for the interface to reach 400K (blue curve), 500K (red curve), 600K (green curve) as a function of dielectric thickness.
.2: (a) Snapshot of COMSOL model showing three points of interest A,B,C.Transient interface temperature at (b) point A (c) point B (d) point C for HfOx (red curve)

Supplementary figure 18 :
(a) Applied voltage pulse (red trace) and measured current (blue trace) in a SET transition.The device takes about 2ns to complete the transition to the final state (b) Power ( =  * ) consumed during the SET transition (red trace).The total energy obtained by integrating power over time ( = ∫  ) is shown in the blue trace.The total energy is partitioned into switching energy (energy contributed to switching) and excess energy (energy spent after the switching is complete), as discussed in the main text.(c) Applied voltage pulse (red trace) and measured current pulse (blue trace) for a RESET transition (d) Power and energy plots during the RESET transition.Supplementary figure 19: (a) Transient voltage (black trace) and current waveforms (red trace) applied to a discrete resistor (b) DC current measured before and after the pulse for the discrete resistor.

Figure 20 :
(a) Voltage (red trace) and current pulse (blue trace) waveforms during a SET operation.The resistance value is calculated at the maximum current magnitude during the pulse (RPUL -blue boxplot) and immediately before (RINIT -red boxplot) and after (RFIN -green boxplot) the pulse via applying small DC bias V=100mV (b) RFIN vs. RPUL collected from 100 transient traces in (a): The post-switching resistance RFIN > RPUL in ~97% of the collected data points (c) Resistance distribution of RINIT, RPUL, RFIN.The distribution clearly indicates the filament resistance increases after the pulse voltage is scaled down.This resistance increase in the main text.Finally, during the voltage pulse falling transition, the filament growth rate (determined by V, TCF) recedes faster than the filament dissolution rate (determined only by TCF), thereby resulting in the narrowing of the filament.The time evolution of the filament can be calculated by self-consistently solving for conductive filament diameter (Φ) and temperature (TCF) as shown by the flowchart in Supplementary Fig.21.1, the RESET operation also displays filament diameter dependent dissolution rate: the R(t) slope decreases as the filament dissolves.Supplementary Fig.22b shows the measured data (solid green trace) and simulations (black dotted trace) for the resistance time dependency: the model closely matches the measured data.The following equation are used in the model, 1) *  *  (−   ) *  + (( − 1) *  0 ) 1 2/(−1) * Comparison of switching times with previously published reports.The table includes fastest reported switching data from well-studied TMO memristors as well as emerging 2D memristors.The devices reported in this study outperform 2D memristors in terms of both speed and endurance.

Table 2 -
Comparison of reported endurance in 2D memristors.